This course can also be taken for academic credit as ECEA 5361, part of CU Boulder’s Master of Science in Electrical Engineering degree.
This course is part of the FPGA Design for Embedded Systems Specialization
About this Course
Skills you will gain
- Writing Code in Verilog
- Simulating FPGA Designs
- Designing FPGA Logic
- Designing Test Benches
- Writing code in VHDL
Start working towards your Master's degree
Syllabus - What you will learn from this course
Basics of VHDL
VHDL Logic Design Techniques
Basics of Verilog
Verilog and System Verilog Design Techniques
- 5 stars58.92%
- 4 stars27.97%
- 3 stars6.94%
- 2 stars2.97%
- 1 star3.17%
TOP REVIEWS FROM HARDWARE DESCRIPTION LANGUAGES FOR FPGA DESIGN
This course is very helpful in understanding the basics of hardware description languages and now after doing this course i am very much comfortable in using verilog and vhdl language.
Excellent course, helped me to gain reasonably good foundation on both VHDL and Verilog effectively in a short period of time.
I think this is a good start in learning how to write VHDL and Verilog.
I would like to see a next level course or recommendations for further writing code.
The course helped in showing the different styles of the Verilog and VHDL coding.
Understood the advantages of Verilog and VHDL in real life applications
About the FPGA Design for Embedded Systems Specialization
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