About this Course

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Shareable Certificate
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100% online
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Intermediate Level

Practicing engineer or graduate level engineering student.

Approx. 10 hours to complete
English

What you will learn

  • Create a Nios II softcore processor hardware design using the Altera development flow

  • Understand the benefits and steps of implementation of a custom instruction in the Nios II soft processor.

  • List the types of IP available for FPGAs

  • Use simulation with ModelSim to verify an FPGA Design

Skills you will gain

  • Software Design for Softcore Processors
  • Softcore Processor Design
  • Programmable Logic Design
  • Simulation for Verification
  • Intellectual Property Integration
Flexible deadlines
Reset deadlines in accordance to your schedule.
Shareable Certificate
Earn a Certificate upon completion
100% online
Start instantly and learn at your own schedule.
Intermediate Level

Practicing engineer or graduate level engineering student.

Approx. 10 hours to complete
English

Offered by

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University of Colorado Boulder

Start working towards your degree

This Course is part of an online degree program offered by the University of Colorado Boulder. When you enroll in a for-credit non-degree course through the university and complete it online, it counts as credit hours towards a degree at CU-Boulder. All you have to do is apply through the university.

Syllabus - What you will learn from this course

Week
1
Week 1
2 hours to complete

Softcore Processor Development Flow

2 hours to complete
11 videos (Total 86 min), 1 reading, 1 quiz
Week
2
Week 2
3 hours to complete

Writing Software for Softcore Processors

3 hours to complete
8 videos (Total 33 min), 1 reading, 1 quiz
Week
3
Week 3
2 hours to complete

IP Acquisition and Integration

2 hours to complete
6 videos (Total 26 min), 1 reading, 1 quiz
Week
4
Week 4
4 hours to complete

Introducing ModelSim and Simulation for Verification

4 hours to complete
8 videos (Total 67 min), 1 reading, 1 quiz

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About the FPGA Design for Embedded Systems Specialization

FPGA Design for Embedded Systems

Frequently Asked Questions

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